1. Field of the Invention
The present invention relates to a control circuit and a data hold device using the control circuit.
2. Description of the Related Art
A data hold device used in a latch circuit such as a sequential circuit, for example, is a conventional circuit formed by connecting two inverting circuit loops in series. However, such data hold device can only hold data in a volatile manner. Thus, if the power is cut off, the data gets lost. That is, even it is powered on again, the data before power off cannot get recovered.
As a result, when using such latch circuit with the data hold device to conduct sequence process, in order to hold data, it is necessary to maintain the power on in case of interruption. This would result in electricity consumption. In addition, it has to re-run the operation process from the beginning on condition that the sequence process is interrupted for accidents such as power cut, which would result in a great loss of time.
In order to solve this problem, the applicant of the present invention has proposed and disclosed a data hold device using ferroelectric capacitor to hold data in a non-volatile manner in Patent Document 1.
FIG. 71 is a circuit diagram of an example of a conventional data hold device.
The data hold device in the drawing is formed by the connection of the signal wire (in a voltage signal form for holding data shown as the thick line part) in the storage element which includes the loop structure portion (the portion surrounded by dotted lines) having the inverter INVx and INVy to the ferroelectric element CL.
When the power is off, the voltage of the signal lines is used to set the residual polarization state of the ferroelectric element CL to write data to the ferroelectric element CL. Data can be held in a non-volatile manner even after power off by such write action.
On the other hand, when the data written into the ferroelectric element CL is read, the node N is in a floating state after power on. Voltage pulse is applied to one side of the ferroelectric element CL from the plate line PL, which makes the node N generates a voltage signal corresponding to the residual polarization state of the ferroelectric element CL. The voltage signal generated by node N perform data determination (0/1 determination) according to threshold of the inverter INVx.
In addition, other prior arts relevant to the present invention include patent document 2 given by the applicant of the present invention.